A power management integrated circuit (PMIC) may include multiple power supply voltages and power management functions within a single integrated circuit (IC). A PMIC may include a high voltage level shifter circuit.
A conventional high voltage level shifter circuit (e.g., a laterally diffused metal-oxide semiconductor field-effect transistor (MOSFET) (LDMOS), a drain-extended MOSFET (DEMOS)) uses large and slow high-voltage devices to handle large voltage differences (e.g., from e.g., 0 volt (V) to 6V, and from e.g., 17V to 23V). Due to a cross-coupled transistor pair structure, a positive output transition and a negative output transition experience large skew across process, voltage, and temperature (PVT) variations. Such a large skew may cause timing issues for succeeding blocks/stages of circuits. Furthermore, the slower output transition edge limits overall speed.